| Q:
Do I have to program the FPGA
after power-on? |
A:
No. There is a configuration
EEPROM on the board to load the FPGA configuration data.
|
| Q:
Can the configuration EEPROM be
programmed via USB? |
| A:
Yes, the configuration EEPROM
can be programmed via USB. It can also be programmed via the
JTAG port using the Xilinx programming tools (sold
separately by Xilinx). |
| Q:
Can the FPGA be programmed via USB? |
| A:
Yes, the FPGA can be programmed via USB. It can also be
programmed via the JTAG port using the Xilinx programming
tools (sold separately by Xilinx). |
| Q:
What programming modes are used to program the FPGA and the
EEPROM? |
| A:
Three programming modes are
supported to program the FPGA and/or the configuration
EEPROM: Master Serial, Slave Serial and JTAG. |
| Q:
How long does it take to
program the FPGA/EEPROM via USB? |
A:
The programming time depends on
the density of the FPGA so it may vary.
In most cases it takes less than one second to program the
FPGA/EEPROM.
|
| Q:
Can board power be supplied from the USB bus? |
| A:
Yes, the board can be powered from the USB bus (bus powered
mode) or it can be powered from an external power supply
(self powered mode). |
| Q:
What is the maximum frequency I can supply to the FPGA? |
| A:
According to Xilinx Spartan-3 datasheet, the FPGA should be
able to run up-to 250MHz. The actual frequency depends on
the complexity of your design. |
| Q:
Are the Xilinx Spartan-3 FPGA
IO pins 5-V tolerant? |
| A:
No, Spartan-3 devices do not
support 5-V VccIO. External serial resistors or voltage
translators are required to interface 5-V logic to Spartan-3
FPGA. |
| Q:
What is the FPGA USB interface? |
| A:
Simple asynchronous FIFO interface. All USB functions are
handled external to the FPGA. FPGA code has no awareness of
USB complexity. Once data arrives from host, FIFO empty flag
goes false and data can be read out as if it were any other
FIFO. Writes are handled similarly. |